Huge state machine delay in post-synthesis timing simulation

I have been doing some simulation about my project and I wanted to show you guys some pictures to get your experienced ideas. First one is post-synthesis functional simulation and it is what it is meant to be. However, the second one is wrong. Because there is a huge delay in states. As soon as padding_in_valid is active, state_reg should have been 10 but after 5-6 clk it gets correct states. Does anyone know why there is that huge delay?

Post-functional simulation:

(click to enlarge)

Timing simulation:

(click to enlarge)

And another question is why there is UUUUU or ZZZZZ. I have assign zero in reset situation to all buffers.