Simulation of a microcontroller with external components such as GPIO, Display, Analog-Sticks

2020-11-19 21:28 Oskar Huang imported from Stackoverflow

I've already used QEMU to emulate a Cortext M4 based board. Is it possible to emulate other external microcontroller components like LEDs, GPIO, Display, Analog-Sticks? I'm clueless about where to start. I really appreciate it very much if someone could give me some tips or references for a good starting point.

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I cannot see some signals within a bus during simultaion - verilog

I designed a module named wishbone, responsible for some actions (it is a top module which is supposed to interconnect other modules to accomplish a certain function). Also, within the wishbone module, one can notice that only "a batch" of signals provide useful data at a time, thus, for instance, when wr_data_instructions signal from wishbone module is active, there will be involved only wr_data_instructions and rd_data_instructions signals. Consequently, I decided to use a single bus in order to be shared by all those signals. Nevertheless, I come across some issues, because the simulation doesn't seem to work, as long as I cannot see the "in" (now I commented the "in" signal within the module instantiation because it caused a warning) signal or "o" signal etc. Here is the code for the wishbone module:

//wishbone module
module wishbone(
    input clk,rst,
    output reg [2:0]in,
    output reg wr_en_instructions,wr_en_display,
    input [2:0] wr_data_instructions,//created for usr, in order to make possible to write data
    output reg [3:0] wr_data_display,
    output [2:0] rd_data_instructions,
    output [3:0] rd_data_display,//created for user, in order to make possible the display
    output [12:0]o
);

reg [15:0] pointer_instructions,pointer_display;

initial wr_en_instructions = 1'b1;//not necessary
/*
by element X it is ment sizeof(X), i.e. number of lines within the bus
pointer_instructions + wr_data_instructions + rd_data_instructions
pointer_display + wr_dara_display + rd_data_display
3 + 3 = 6 => requires 6 lines
4 + 4 = 8 => requires 8 lines
=> requires 8 (max(6,8))
encoding:
case 1 (wr_en_instructions):
wr_data_instrucitons: [2:0]
rd_data_instructions: [5:3]
case 2 (~wr_en_instructions):
wr_data_display: [3:0]
rd_data_display: [7:4]
*/
control_unit i0(.clk(clk),.rst(rst),.in(in),.o(o));
user i1(.clk(clk),.wr_en(wr_en_instructions),.address_in(pointer_instructions),.wr_data(wr_data_instructions),.rd_data(rd_data_instructions));
display i2(.clk(clk),.wr_en(wr_en_display),.address_in(pointer_display),.wr_data(wr_data_display),.rd_data(rd_data_display));
integer i = 0;
always @ * begin
    wr_en_display = ~wr_en_instructions;
end
always @(posedge clk) begin
    if(rst) begin
        wr_en_instructions <= 1'b1;
        pointer_instructions <= 16'd0;
        pointer_display <= 16'd0;
    end
    else begin
        if(wr_en_instructions) begin
            if(wr_data_instructions[2] == 1'b1) begin
                pointer_instructions <= 16'd0;
                pointer_display <= 16'd0;
                wr_en_instructions <= 1'b0;
            end
        end
        else begin
            in <= rd_data_instructions;
            pointer_instructions <= pointer_instructions + 1;
            if(rd_data_instructions == 3'b010) begin
                wr_data_display <= o;
                pointer_display <= pointer_display + 1;
            end
            else if(rd_data_instructions == 3'b100) begin
               wr_en_instructions <= 1'b1;
            end
        end
    end
end

endmodule

and here is the code for my top module that uses the wishbone module:

    `include "wishbone.v"
/*
by element X it is ment sizeof(X), i.e. number of lines within the bus
pointer_instructions + wr_data_instructions + rd_data_instructions
pointer_display + wr_dara_display + rd_data_display
3 + 3 = 6 => requires 6 lines
4 + 4 = 8 => requires 8 lines
=> requires 8 (max(6,8))
encoding:
case 1 (wr_en_instructions):
wr_data_instrucitons: [2:0]
rd_data_instructions: [5:3]
case 2 (~wr_en_instructions):
wr_data_display: [3:0]
rd_data_display: [7:4]
*/
module bus(
  input clk,rst,//clock and reset signals for wishbone
  output [2:0] in,//input
  output chip_select,//wr_en_instructions or ~wr_en_display
  output chip_select_b,//~wr_en_instructions or wr_en_display
  inout [7:0] wishbone_bus,//wishbone bus
  output [12:0] o//output
);

reg [2:0] wr_data_instrucitons;
wire [2:0] rd_data_instructions;
wire [3:0] wr_data_display,rd_data_display;

wishbone i0(
    .clk(clk),.rst(rst),
    .in(in),
    .wr_en_instructions(chip_select),//2:1 multiplexer
    .wr_en_display(chip_select_b),//2:1 multiplexer
    .wr_data_instructions(wr_data_instrucitons),
    .wr_data_display(wr_data_display),
    .rd_data_instructions(rd_data_instructions),
    .rd_data_display(rd_data_display),
    .o(o)
);

always @ * begin
    if(chip_select) begin
        wishbone_bus[2:0] = wr_data_instrucitons;
        wishbone_bus[5:3] = rd_data_display;
    end
    else begin
        wr_data_display = wishbone_bus[3:0];//how to solve?
        wishbone_bus[7:4] = rd_data_display;
    end
end

endmodule

and finally here is my testbench:

//bus testbench
module bus_tb(
    output reg clk,rst,
    output [2:0]in,
    output wr_en_instructions,wr_en_display,
    output reg [2:0] wr_data_instructions,//created for usr, in order to make possible to write data
    output [3:0] wr_data_display,
    output [2:0] rd_data_instructions,
    output [3:0] rd_data_display,//created for user, in order to make possible the display
    output [12:0]o
);

wire [7:0] wb;

assign wb = wr_en_instruction ?
            {1'b0,1'b0,rd_data_instructions,wr_data_instructions} :
            {rd_data_display,wr_data_display};

bus cut(
    .clk(clk),.rst(rst),
    .chip_select(wr_en_instruction),
    .chip_select_b(wr_en_display),
    //.in(in),
    .wishbone_bus(wb),
    .o(o)
);

initial $dumpvars(0,bus_tb);

initial begin
    clk = 1'b1;
    repeat (600000)
    #100 clk = ~clk;
end

initial begin
    rst = 1'b1;
    #400 rst = 1'b0;
end

initial begin
    wr_data_instructions = 3'd1;
    #3000400 wr_data_instructions = 3'd2;
    #1000000 wr_data_instructions = 3'd1;
    #3000000 wr_data_instructions = 3'd0;
    #2000000 wr_data_instructions = 3'd3;
    #1000000 wr_data_instructions = 3'd1;
    #3000000 wr_data_instructions = 3'd4;//halt
end

endmodule

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Let's denote refVar, a variable of interest that contains experimental data. For the simulation study, I would like to generate other variables V0.05, V0.10, V0.15 until V0.95. Note that for the variable name, the value following V represents the correlation between the variable and refVar (in order to quick track in the final dataframe). My readings led me to multivariate_normal() from numpy. However, when using this function, it generates 2 1D-arrays both with random numbers. What I want is to always keep refVar and generate other arrays filled with random numbers, while meeting the specified correlation. Please, find below my my code. To cut it short, I've no clue how to generate other variables relative to my experimental variable refVar. Ideally, I would like to build a data frame containing the following columns: refVar,V0.05,V0.10,...,V0.95. I hope you get my point and thank you in advance for your time
```
import numpy as np
import pandas as pd
from numpy.random import multivariate_normal as mvn

refVar = [75.25,77.93,78.2,61.77,80.88,71.95,79.88,65.53,85.03,61.72,60.96,56.36,23.16,73.36,64.18,83.07,63.25,49.3,78.2,30.96]
mean_refVar = np.mean(refVar)
for r in np.arange(0,1,0.05):
    var1 = 1
    var2 = 1
    cov = r 
    cov_matrix = [[var1,cov],
                 [cov,var2]]
    data = mvn([mean_refVar,mean_refVar],cov_matrix,size=len(refVar))
    output = 'corr_'+str(r.round(2))+'.txt'
    df = pd.DataFrame(data,columns=['refVar','v'+str(r.round(2)])
    df.to_csv(output,sep='\t',index=False) # Ideally, instead of creating an output for each correlation, I would like to generate a DF with refVar and all these newly created Series
```

I2C protocol Using TM4C1294NCPDT and MAX6955 LED Display driver

Please find the below code snippet and let me know that ways to troubleshoot.

#include <stdbool.h>
#include <stdint.h>
#include <stdarg.h>
#include "inc/hw_i2c.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "inc/hw_ints.h"
#include "driverlib/gpio.h"
#include "driverlib/i2c.h"
#include "driverlib/interrupt.h"
#include "driverlib/pin_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/uart.h"
#include "utils/uartstdio.h"
#include "driverlib/gpio.h"

#define SLAVEADDRESS_EXT 0x65
#define NUM_OF_I2CBYTES 255

#define reg_noOp 0x00
#define reg_decodeMode 0x01
#define reg_globalIntensity 0x02
#define reg_scanLimit 0x03
#define reg_controlRegister 0x04
#define reg_displayTest 0x07
#define reg_digitType 0x0C
#define reg_intensity10 0x10
#define reg_internsity32 0x11
#define reg_internsity54 0x12
#define reg_internsity76 0x13

#define USE_GLOBAL 0x00
#define USE_DISCRETE 0x40
#define RUN 0x02
#define SHUTDOWN 0x00

#define reg_digit0 0x20
#define reg_digit1 0x21
#define reg_digit2 0x22
#define reg_digit3 0x23
#define reg_digit4 0x24
#define reg_digit5 0x25
#define reg_digit6 0x26
#define reg_digit7 0x27

uint32_t ui32SysClock;

void writeI2C0( uint8_t slaveaddress, uint8_t device_register, uint8_t device_data )
{
    I2CMasterSlaveAddrSet( I2C0_BASE, SLAVEADDRESS_EXT, false );

    //register to be read
    I2CMasterDataPut( I2C0_BASE, device_register );

    //send control byte and register address byte to slave device
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START );

    //wait for MCU to finish transaction
    while( I2CMasterBusy( I2C0_BASE ) );

    // I2CMasterSlaveAddrSet(I2C0_BASE, device_address, true);

    //specify data to be written to the above mentioned device_register
    I2CMasterDataPut( I2C0_BASE, device_data );

    //wait while checking for MCU to complete the transaction
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH );

    //wait for MCU & device to complete transaction
    while( I2CMasterBusy( I2C0_BASE ) );
}

void initMAX6955( void )
{
    I2CMasterSlaveAddrSet( I2C0_BASE, SLAVEADDRESS_EXT, false );
    I2CMasterDataPut( I2C0_BASE, reg_decodeMode );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, 0xFF );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, reg_globalIntensity );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, 0x08 );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, reg_scanLimit );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, 0x07 );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, reg_controlRegister );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, 0x01 );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, reg_digitType );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, 0xFF );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, reg_displayTest );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
    while( I2CMasterBusy( I2C0_BASE ) );

    I2CMasterDataPut( I2C0_BASE, 0x01 );
    I2CMasterControl( I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH );
    while( I2CMasterBusy( I2C0_BASE ) );
}

void InitConsole( void )
{
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOA );
    GPIOPinConfigure( GPIO_PA0_U0RX );
    GPIOPinConfigure( GPIO_PA1_U0TX );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_UART0 );
    UARTClockSourceSet( UART0_BASE, UART_CLOCK_PIOSC );
    GPIOPinTypeUART( GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1 );
    UARTStdioConfig( 0, 115200, 16000000 );
}

int main( void )
{
    ui32SysClock = SysCtlClockFreqSet( (SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_240), 80000000 );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_I2C0 );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOB );
    GPIOPinConfigure( GPIO_PB2_I2C0SCL );
    GPIOPinConfigure( GPIO_PB3_I2C0SDA );
    GPIOPinTypeI2CSCL( GPIO_PORTB_BASE, GPIO_PIN_2 );
    GPIOPinTypeI2C( GPIO_PORTB_BASE, GPIO_PIN_3 );

    I2CMasterEnable( I2C0_BASE );
    I2CMasterInitExpClk( I2C0_BASE, ui32SysClock, false );

    InitConsole();

    UARTprintf( "The slave address: %X\n", SLAVEADDRESS_EXT );

    initMAX6955();

    while( 1 )
    {
        writeI2C0( SLAVEADDRESS_EXT, reg_digit1, 0x41 );
        writeI2C0( SLAVEADDRESS_EXT, reg_digit2, 0x58 );
        writeI2C0( SLAVEADDRESS_EXT, reg_digit3, 0x49 );
        writeI2C0( SLAVEADDRESS_EXT, reg_digit4, 0x4D );
        writeI2C0( SLAVEADDRESS_EXT, reg_digit5, 0x2D );
        writeI2C0( SLAVEADDRESS_EXT, reg_digit4, 0x49 );
        writeI2C0( SLAVEADDRESS_EXT, reg_digit5, 0x43 );

    }
}

I'm trying to develop the I2C communication protocol to display respective digits on MAX6955. Before, I write the data in the digit. I have to initialize the MAX6955 display driver.

It seems to be unresponsive and unable to write the data in the Digit.

Please have a look and let me know the troubleshooting or different approach.

Directory of standard AVR header files

I'm running Ubuntu 20.10 and I'm trying to compile c-files from a custom directory (~/Desktop/AVR/.../main.c). I'm writing my c-files in VSCode. All of that works great.

My issue is that VSCode can't detect the include header files, even though I've added the directory where delay.h, io.h, etc. are located, "/usr/lib/avr/include/avr", to the includePath in c_cpp_properties.json. Am I using the wrong directory?

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/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f3xx_hal.h"
#include "stm32f3xx_hal_adc.h"

/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdio.h>
#include <string.h>
/* USER CODE END Includes */

/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc1;

UART_HandleTypeDef huart2;

/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_ADC1_Init(void);
static void MX_USART2_UART_Init(void);

int main(void)
{
  /* USER CODE BEGIN 1 */
    uint16_t raw;
    char msg[10];


  /* USER CODE END 1 */

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();

  /* USER CODE BEGIN Init */
  //Reset and clock control - Advanced high-performance bus - Enabling GPIO Port C pin 6 and Port B pin 1
    //RCC -> AHBENR |= RCC_AHBENR_GPIOCEN;
    RCC -> AHBENR |= RCC_AHBENR_GPIOAEN;

    //Setup Control Registers for the LED output
    //Mode register as Output
    GPIOA -> MODER |= GPIO_MODER_MODER5_0| GPIO_MODER_MODER1_0 | GPIO_MODER_MODER0_0;
    GPIOA -> MODER &= ~(GPIO_MODER_MODER5_1)|~(GPIO_MODER_MODER1_1)|~(GPIO_MODER_MODER0_1);
    //OtypeR - Push pull
    GPIOA -> OTYPER &= ~(GPIO_OTYPER_OT_5)|~(GPIO_OTYPER_OT_1)|~(GPIO_OTYPER_OT_1);
    //OspeedR - High
    GPIOA -> OSPEEDR |= (GPIO_OSPEEDER_OSPEEDR5)|(GPIO_OSPEEDER_OSPEEDR1)|(GPIO_OSPEEDER_OSPEEDR0);
    //PUPDR
    GPIOA -> PUPDR &= ~(GPIO_PUPDR_PUPDR5)|~(GPIO_PUPDR_PUPDR1)|~(GPIO_PUPDR_PUPDR0);

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
  MX_ADC1_Init();
  MX_USART2_UART_Init();
  /* USER CODE BEGIN 2 */

  /* USER CODE END 2 */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
  {
      printf("Starting...");
      HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10, GPIO_PIN_SET);

      //Get ADC Value
      HAL_ADC_Start(&hadc1);
      HAL_ADC_PollForConversion(&hadc1, HAL_MAX_DELAY);
      raw = HAL_ADC_GetValue(&hadc1);

      //Test: Set GPIO Pin Low
      HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10, GPIO_PIN_RESET);

      //Convert to string and print
      sprintf(msg, "%hu\r\n", raw);
      HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY);

      //Pretend we have something else to do for a while
      HAL_Delay(1);
    /* USER CODE END WHILE */

    /* USER CODE BEGIN 3 */
  }
  /* USER CODE END 3 */
}

void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
  RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }
  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  {
    Error_Handler();
  }
  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_ADC12;
  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
  PeriphClkInit.Adc12ClockSelection = RCC_ADC12PLLCLK_DIV1;
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  {
    Error_Handler();
  }
}

/**
  * @brief ADC1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_ADC1_Init(void)
{

  /* USER CODE BEGIN ADC1_Init 0 */

  /* USER CODE END ADC1_Init 0 */

  ADC_MultiModeTypeDef multimode = {0};
  ADC_ChannelConfTypeDef sConfig = {0};

  /* USER CODE BEGIN ADC1_Init 1 */

  /* USER CODE END ADC1_Init 1 */
  /** Common config
  */
  hadc1.Instance = ADC1;
  hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
  hadc1.Init.ContinuousConvMode = DISABLE;
  hadc1.Init.DiscontinuousConvMode = DISABLE;
  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
  hadc1.Init.NbrOfConversion = 1;
  hadc1.Init.DMAContinuousRequests = DISABLE;
  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
  hadc1.Init.LowPowerAutoWait = DISABLE;
  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
  {
    Error_Handler();
  }
  /** Configure the ADC multi-mode
  */
  multimode.Mode = ADC_MODE_INDEPENDENT;
  if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
  {
    Error_Handler();
  }
  /** Configure Regular Channel
  */
  sConfig.Channel = ADC_CHANNEL_3;
  sConfig.Rank = ADC_REGULAR_RANK_1;
  sConfig.SingleDiff = ADC_SINGLE_ENDED;
  sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
  sConfig.OffsetNumber = ADC_OFFSET_NONE;
  sConfig.Offset = 0;
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
  {
    Error_Handler();
  }
  /* USER CODE BEGIN ADC1_Init 2 */

  /* USER CODE END ADC1_Init 2 */

}

/**
  * @brief USART2 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART2_UART_Init(void)
{

  /* USER CODE BEGIN USART2_Init 0 */

  /* USER CODE END USART2_Init 0 */

  /* USER CODE BEGIN USART2_Init 1 */

  /* USER CODE END USART2_Init 1 */
  huart2.Instance = USART2;
  huart2.Init.BaudRate = 38400;
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
  huart2.Init.StopBits = UART_STOPBITS_1;
  huart2.Init.Parity = UART_PARITY_NONE;
  huart2.Init.Mode = UART_MODE_TX_RX;
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
  if (HAL_UART_Init(&huart2) != HAL_OK)
  {
    Error_Handler();
  }
  /* USER CODE BEGIN USART2_Init 2 */

  /* USER CODE END USART2_Init 2 */

}

/**
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
  GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOF_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10, GPIO_PIN_RESET);

  /*Configure GPIO pin : PA10 */
  GPIO_InitStruct.Pin = GPIO_PIN_10;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

}

/* USER CODE BEGIN 4 */

/* USER CODE END 4 */

 /**
  * @brief  Period elapsed callback in non blocking mode
  * @note   This function is called  when TIM6 interrupt took place, inside
  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM6) {
    HAL_IncTick();
  }
  /* USER CODE BEGIN Callback 1 */

  /* USER CODE END Callback 1 */
}

/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
  {
  }
  /* USER CODE END Error_Handler_Debug */
}

#ifdef  USE_FULL_ASSERT
/**
  * @brief  Reports the name of the source file and the source line number
  *         where the assert_param error has occurred.
  * @param  file: pointer to the source file name
  * @param  line: assert_param error line source number
  * @retval None
  */
void assert_failed(uint8_t *file, uint32_t line)
{
  /* USER CODE BEGIN 6 */
  /* User can add his own implementation to report the file name and line number,
     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
  /* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

Android Studio Emulator: emulator64-crash-service quit unexpectedly

Configuration

I have a Macbook Pro (Retina, 13 inch, 2016) that is running macOS Big Sur 11.1

Bug Report

Android Studio always results in a crash (emulator64-crash-service quit unexpectedly.)

Before upgrading to macOS Big Sur, Android Emulator was working well. But since I upgraded the OS, Android emulators always crash.

Using both the AVD Manager in Android Studio and the Terminal, the AVD crashes with these logs:

./emulator -netdelay none -netspeed full -avd Pixel_API_28
emulator: Android emulator version 30.3.5.0 (build_id 7033400) (CL:N/A)
handleCpuAcceleration: feature check for hvf
emulator: WARNING: Running on a system with less than 6 logical cores. Setting number of virtual cores to 1
2021-01-21 11:51:29.242 qemu-system-x86_64[17602:214627] ApplePersistence=YES

The program exits without any additional logs so there is no way to identify the root cause.

And after that, a problem report is opened stating that emulator64-crash-service quit unexpectedly

System Integrity Protection: enabled

Crashed Thread:        0  Dispatch queue: com.apple.main-thread

Exception Type:        EXC_BAD_ACCESS (SIGSEGV)
Exception Codes:       KERN_INVALID_ADDRESS at 0x0000000000000000
Exception Note:        EXC_CORPSE_NOTIFY

Termination Signal:    Segmentation fault: 11
Termination Reason:    Namespace SIGNAL, Code 0xb
Terminating Process:   exc handler [17603]

VM Regions Near 0:
--> 
    __TEXT                      10f359000-1103a1000    [ 16.3M] r-x/rwx SM=COW  /Users/*/Library/Android/*

Thread 0 Crashed:: Dispatch queue: com.apple.main-thread
0   libdispatch.dylib               0x00007fff201afaa6 dispatch_release + 4
1   com.apple.AppKit                0x00007fff236b66df -[NSPersistentUIManager dealloc] + 37
2   com.apple.AppKit                0x00007fff22c72880 -[NSPersistentUIManager initWithBundleID:] + 384
3   com.apple.Foundation            0x00007fff2118a04c _NSFaultInObject + 27
4   com.apple.HIToolbox             0x00007fff286c8ba9 _HIPersistentUICreatePersistentWindow + 46
5   com.apple.HIToolbox             0x00007fff286c8aba WindowStateSetMenuBarState(unsigned int, double, void const*) + 43
6   com.apple.HIToolbox             0x00007fff286b8ee5 MBWindows::CreateWindow(CGRect, unsigned int) + 373
7   com.apple.HIToolbox             0x00007fff286b8c69 MBWindows::GetWindowOnDisplay(unsigned int, unsigned char) + 183
8   com.apple.HIToolbox             0x00007fff286b8abd MenuBarInstance::ForEachWindowDo(unsigned char, bool (OpaqueWindowPtr*, unsigned int) block_pointer) + 183
9   com.apple.HIToolbox             0x00007fff286b89c3 MenuBarInstance::SetBoundsAndUpdateResolution() + 103
10  com.apple.HIToolbox             0x00007fff286b8571 MenuBarInstance::Show(MenuBarAnimationStyle, unsigned char, unsigned char, unsigned char, unsigned char) + 275
11  com.apple.HIToolbox             0x00007fff286b7fb8 MenuBarInstance::UpdateAggregateUIMode(MenuBarAnimationStyle, unsigned char, unsigned char, unsigned char) + 798
12  com.apple.HIToolbox             0x00007fff286b7bba MenuBarInstance::ForEachMenuBarDo(void (MenuBarInstance*) block_pointer) + 46
13  com.apple.HIToolbox             0x00007fff286b7b5a UpdateAllAggregateUIModes(MenuBarAnimationStyle, unsigned char) + 126
14  com.apple.HIToolbox             0x00007fff286b7ac6 SetSystemUIMode + 165
15  com.apple.AppKit                0x00007fff22fee43b -[NSApplication _setPresentationOptions:instance:flags:] + 1010
16  libqcocoa.dylib                 0x00000001133bfc14 QCocoaIntegration::QCocoaIntegration(QStringList const&) + 1796
17  libqcocoa.dylib                 0x00000001133bf23e QCocoaIntegrationPlugin::create(QString const&, QStringList const&) + 78
18  libQt5GuiAndroidEmu.5.12.1.dylib    0x0000000111c79c26 QPlatformIntegrationFactory::create(QString const&, QStringList const&, int&, char**, QString const&) + 198
19  libQt5GuiAndroidEmu.5.12.1.dylib    0x0000000111c85d69 QGuiApplicationPrivate::createPlatformIntegration() + 2473
20  libQt5GuiAndroidEmu.5.12.1.dylib    0x0000000111c8707b QGuiApplicationPrivate::createEventDispatcher() + 27
21  libQt5CoreAndroidEmu.5.12.1.dylib   0x000000011169e74f QCoreApplicationPrivate::init() + 1567
22  libQt5GuiAndroidEmu.5.12.1.dylib    0x0000000111c823c9 QGuiApplicationPrivate::init() + 57
23  libQt5WidgetsAndroidEmu.5.12.1.dylib    0x000000011238a4ba QApplicationPrivate::init() + 26
24  emulator64-crash-service        0x000000010f361ec5 main + 1285
25  libdyld.dylib                   0x00007fff20376621 start + 1

Thread 1:
0   libsystem_pthread.dylib         0x00007fff20357458 start_wqthread + 0

Thread 2:
0   libsystem_pthread.dylib         0x00007fff20357458 start_wqthread + 0

Thread 0 crashed with X86 Thread State (64-bit):
  rax: 0x011dffff8839de21  rbx: 0x00007f930b53ab10  rcx: 0x0080000000000000  rdx: 0x0100000000000000
  rdi: 0x0000000000000000  rsi: 0x00007fff7c59fd2c  rbp: 0x00007ffee08a5480  rsp: 0x00007ffee08a5480
   r8: 0x00000000000036be   r9: 0x00000000000036c2  r10: 0x00007fff8839de22  r11: 0x00007fff236b66ba
  r12: 0x0000000000000e6c  r13: 0x00007f930b523720  r14: 0x00007fff201f99a0  r15: 0x0000000000000000
  rip: 0x00007fff201afaa6  rfl: 0x0000000000010246  cr2: 0x0000000000000000
  
Logical CPU:     2
Error Code:      0x00000004 (no mapping for user data read)
Trap Number:     14

I looked up possible issues in Qt or Qemu but I have no idea what's the issue here and how it could be related to MacOS Big Sur

I tried uninstalling and reinstalling:

Android Studio
Intel x86 Emulator Accelerator (HAXM installer)

I also tried to Wipe data and cold boot the AVDs

Please advise if anyone has encountered this issue recently

getting periodic errors when running a docker container

I'm trying to run a Docker container in a Debian-ARM running over QEMU. When I run the container, the following lines appear on the terminal indefinitely:

[10673.758652] IPv6: ADDRCONF(NETDEV_CHANGE): veth74b0fb0: link becomes ready
[10673.762932] br-cd67d91e7678: port 3(veth74b0fb0) entered forwarding state
[10673.763784] br-cd67d91e7678: port 3(veth74b0fb0) entered forwarding state
[10688.807736] br-cd67d91e7678: port 3(veth74b0fb0) entered forwarding state
[10690.855011] br-cd67d91e7678: port 3(veth74b0fb0) entered disabled state
[10691.132371] br-cd67d91e7678: port 3(veth74b0fb0) entered disabled state
[10691.173230] device veth74b0fb0 left promiscuous mode
[10691.173686] br-cd67d91e7678: port 3(veth74b0fb0) entered disabled state
[10739.632722] aufs au_opts_verify:1570:dockerd[388]: dirperm1 breaks the protection by the permission bits on the lower branch
[10739.848162] device veth2acd7ba entered promiscuous mode
[10739.873819] IPv6: ADDRCONF(NETDEV_UP): veth2acd7ba: link is not ready

I guess this problem could be caused by some misconfigured network interface, but I don't know how to solve it.

I'd be glad if someone can help me with this issue!

Thanks in advance!

How to use USB with QEMU on a Mac host?

I tried the following to access a USB storage device via an Ubuntu guest running on macOS host:

qemu-system-x86_64 -m 8G -boot d -smp 4 -net nic -net user \
   -hda Ubuntu/ubuntu.img -machine type=q35,accel=hvf \
   -device intel-hda -device hda-duplex \
   -device nec-usb-xhci -device usb-host,vendorid=0x0781,productid=0x5580

Unfortunately I can not access the USB device from the guest. Guest syslog says:

... kernel: [...] usb 5-1: USB new high-speed USB device number 3 using xhci_hcd
... kernel: [...] usb 5-1: New USB device found, idVendor=0781, idProduct=5580, bcdDevice= 0.10
... kernel: [...] usb 5-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
... kernel: [...] usb 5-1: Product: Extreme
... kernel: [...] usb 5-1: Manufacturer: SanDisk
... kernel: [...] usb 5-1: SerialNumber: AA010829152XXXXXXX
... kernel: [...] usb 5-1: can't set config #1, error -32
... mtp-probe: checking bus 5 device 3: "/sys/devices/pci0000:00/0000:00:04.0/usb5/5-1"
... mtp-probe: bus: 5, device:3 was not an MTP device

How can I successfully access the USB device?

USB is required for doing Android development via Android Studio with a physical device.

I tried two USB-sticks and an Android smartphone in file transfer mode.

Version information: macOS: 10.13.6, qemu: 5.1.0, Ubuntu: 20.04.

why am I getting a precise bus fault exception (PRECISERR) on what looks like a perfectly fine aligned access (cortex-m7)
I'm getting a HardFault that results from a forced/escalated Precise Bus Fault Exception, as indicated by the PRECISERR bit in the BFSR register, and I can't seem to figure out why it is occurring. The exception occurs from within vendor-supplied startup code that previously executed fine, and I cant see any alignment or memory-related issues.

The offending instruction is ldrlt r0, [r1], #4 on the first iteration through the loop, where the value stored in r1 is 0x00040458

The full instruction sequence is shown below, where other relevant symbols used in r2 and r3 are defined in the comments
```
/*     Loop to copy data from read only memory to RAM. The ranges
 *      of copy from/to are specified by following symbols evaluated in
 *      linker script.
 *      __etext: End of code section, i.e., begin of data sections to copy from.
 *      __data_start__/__data_end__: RAM address range that data should be
 *      __noncachedata_start__/__noncachedata_end__ : none cachable region
 *      copied to. Both must be aligned to 4 bytes boundary.  */

    ldr    r1, =__etext          /* equal to 0x00040458 */
    ldr    r2, =__data_start__   /* equal to 0x20000000 */
    ldr    r3, =__data_end__     /* equal to 0x20000224 */

.LC0:
    cmp     r2, r3
    ittt    lt
    ldrlt   r0, [r1], #4  /* <---- exception triggered here */
    strlt   r0, [r2], #4
    blt    .LC0
```
The offending address listed in BFAR is 0x00040458, which corresponds to the value in r1 and is a perfectly valid 32-bit aligned address within the ITCM region (0x0 --> 0x0007FFFF).

Not sure what else could be causing this exception if the memory access itself looks fine. The exception was introduced by expanding the .text section in my linker file, as shown below
```
MEMORY
{
  m_interrupts  (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000400
  m_text        (RX)  : ORIGIN = 0x00000400, LENGTH = 0x00074000  /* changed from LENGTH = 0x0003FC00 */
  m_data        (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
  m_data2       (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00020000
}
```
If it isn't an alignment issue, I'm not sure what it could be? But 0x00040458 is most definitely word-aligned, as is 0x0004045C which results from the #4 offset to the ldr instruction.

Also, why is 0x0004045C not shown in BFAR, since the cortex-m7 TRM says the ldr instruction applies the offset to the target register value before the memory access occurs??

Full exception registers shown below for completeness
How to change exception priority on cortex-m4 processor in Rust?
I want to set interrupt priorities for processor internal exceptions. The cortex_m crate provides easy access to NVIC control registers. Specifically, there is a method that let me set priority for each interrupt.
```
let mut p = cortex_m::Peripherals::take().unwrap();
p.NVIC.set_priority(...);
```
set_priority asks me to pass an argument specifying for which interrupt I intend to modify the priority. Say I want to change the priority for PendSV. However, passing in cortex_m::peripheral::scb::Exception::PendSV will not work because it does not implement a required trait bound.

I am developing on STM32F407VGT6 board, so I also looked in the stm32f4 crate, but I did not find any enum definition that can help either.

Should I write my own enum that implements the required trait so that it can specify interrupt numbers, or is there already some existing crate that can make it work?
GCC Not finding builtin memcpy

I am doing work on a ARM cortex-m MCU using the arm-none-eabi version of gcc. I am also using -fnostdlib and -fnostdin.

In my code I am using memcpy and strlen. Both of these functions are builtin function as per the gcc manual. When I use these function as is or as __buitin_..., I get undefined reference to ....

Why is gcc not generating the code as expected?

Related questions

Simulation of a microcontroller with external components such as GPIO, Display, Analog-Sticks

See also questions close to this topic

Configuration

Bug Report